.. _type-conversions:

Type conversions
################

Apart from enabling cross-language function calls, a fundamental problem
that a binding tool like PyStim must address is to provide access to
native Python types in SystemVerilog and vice versa. In the PyStim library,
used a Python types wrappers on the SystemVerilog side and a native Python type on the
Python side. PyStim refers to this as a *type conversion*.

The main downside is that a copy of the data must be made on every Python ↔ SystemVerilog 
transition: this is needed since the SystemVerilog and Python versions of the same type 
generally won't have the same memory layout.

PyStim provides almost all Python types wrappers to SystemVerilog . An overview
is provided in the table ":ref:`conversion_table`".

The following subsection discuss Python ↔ SystemVerilog types handling in more
detail. The main focus in this section is on type conversions, which represent
the last case of the above list.

.. toctree::
   :maxdepth: 1

   overview

